# This is a trigger setup file. 
# It is read with the C subroutine read_trig_setup. 
# Section headers must be present ("Spill module:", "Trigger modules:", 
# "Output registers:", "Filter words:"). 
# Anything in a line after a "#" is a comment. 
# ALL NUMBERS ARE IN HEXADECIMAL.

# The trigger setup for each run is derived from the combination of this file 
# and the module config file. So, multiple trigger modules or output registers 
# may be defined here (see trig_info.h for maximum numbers) which will not be
# actually used because they are not in the module config. 
# The rule for the combined setups is: A run may use more than one trigger 
# module but each run is only allowed ONE output register. (There is no
# fundamental reason for this; it just was becoming too complicated.)
 
#------------------------------------------------------------------------------
Spill module:
# Module type, crate and station, and channel with the spill signal
# Only input/output register module type is supported.
# If spill data is not available (not defined, or defined module is not present)
# for real data the spill state defaults to "out of spill". (For simulated data,
# the spill state is taken from the time, and the definition here is ignored.)
# mod type    c & s  spill bit
# 494F5231     116     8000                                              # IOR1

Trigger modules:
# Module type, crate and station, trigger bits (for each of the NRUN=4 runs)
# and readout bits (for each of the NRUN=4 runs). For now, only i/o, input 
# register, ADC and DSC (discriminator) module types are supported.
# Defining a module with all trigger bits zero means that, although it can't
# trigger the event, its data will be available for the event filter.
# mod type    c & s       trigger bits           readout bits
# 494F5231     214     0001 0001 0001 0001    0001 0001 0001 0001        # IOR1
# 494E5231     215     0004 0008 0010 0020    0004 0008 0010 0020        # INR1
# 41444332     211     0002 0001 0001 0001    0002 0001 0001 0001        # ADC2
# 44534331     203     0000 0000 0000 0000    0000 0000 0000 0000        # DSC1
# 44534331     204     0000 0000 0000 0000    0000 0000 0000 0000        # DSC1
#  43434232     00b     0000 0000 0000 0000    0000 0000 0000 0000        # CCB2
  44445532     062     0001 0001 0001 0001    0001 0001 0001 0001        # DDU2

Output registers:
# Module type, crate and station, software trigger bits (for each 
# of the NRUN=4 runs) and trigger unblocking bits (for each of the NRUN=4 runs)
# mod type    c & s   software trigger bits     unblocking bits
# 494F5231     214     0002 0002 0002 0002    0004 0004 0004 0004        # IOR1
# 4F545231     214     0010 0020 0040 0080    0001 0002 0004 0008        # OTR1
# 43434232     00b     0002 0002 0002 0002    0004 0004 0004 0004        # CCB2


Filter words:
# Filter words for each of the NRUN=4 runs. For an event to be kept in a run,
# at least one bit in the filter word of that run must match a bit in the 
# event's trig_filter_word. By convention, bit 0 is always set in the 
# trig_filter_word, so a run whose filter word has bit 0 set is unfiltered.
#  00000001 00000001 00000001 00000001
  00000400 00000400 00000400 00000400